UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 86

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

84
(1) Setting data to special registers
Set data to the special registers in the following sequence:
<1>
<2>
<3>
<4>
<5>
<6>
<7>
<8>
There is no special sequence to read a special register.
Cautions 1. When a store instruction is executed to store data in the command register, an interrupt is
[Example] With PSC register
<1> LD.B
<2> ST.B
<3> MOV
<4> ST.B
<5> ST.B
<6> NOP
<7> TST1
<8> ST.B
Store the DMA transfer state.
Disable DMA operation.
Prepare data to be set to the special register in a general-purpose register.
Write the data prepared in <3> to the command register (PRCMD).
Write the setting data to the special register (by using the following instructions).
• Store instruction (ST/SST instruction)
• Bit manipulation instruction (SET1/CLR1/NOT1 instruction)
Insert NOP instructions (5 instructions).
Check if DMA transfer has ended between <1> and <2> above.
If DMA transfer has not ended and DMA operation is required, enable DMA operation.
ST.B
ANDI
NOP
NOP
NOP
NOP
BNE
next :
(next instruction)
2. Although dummy data is written to the PRCMD register, use the same general-purpose
not acknowledged. This is because it is assumed that steps <4> and <5> above are
performed by successive store instructions. If another instruction is placed between <4>
and <5>, and if an interrupt is acknowledged by that instruction, the above sequence may
not be established, causing malfunction.
register used to set the special register (<5> in Example) to write data to the PRCMD
register (<4> in Example). The same applies when a general-purpose register is used for
addressing.
r11, PSMR[r0]
DCHCn[r0], r12
0xfe, r12, r13
r13 , DCHCn [r0]
0x02 , r10
r10 , PRCMD [r0]
r10 , PSC [r0]
7, DCHCn[r0]
next
r12 , DCHCn [r0]
CHAPTER 3 CPU FUNCTION
User’s Manual U15905EJ2V1UD
; Set PSMR register.
; Store DMA transfer state.
;
; Disable DMA operation.
; Write PRCMD register.
; Set PSC register.
; Dummy instruction
; Dummy instruction
; Dummy instruction
; Dummy instruction
; Dummy instruction
; Check if DMA transfer has ended between <1> and <2>.
;
; Return DMA to the original state.