UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 515

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bus timing
Address setup time (to ASTB↓)
Address hold time (from ASTB↓)
Delay time from RD↓ to address float
Data input setup time from address
Data input setup time from RD↓
Delay time from ASTB↓ to RD↓, WRm↓
Data input hold time (from RD↑)
Address output time from RD↑
Delay time from RD, WRm↑ to ASTB↑
Delay time from RD↑ to ASTB↓
RD, WRm low-level width
ASTB high-level width
Data output time from WRm↓
Data output setup time (to WRm↑)
Data output hold time (from WRm↑)
WAIT setup time (to address)
WAIT hold time (from address)
WAIT setup time (to ASTB↓)
WAIT hold time (from ASTB↓)
HLDRQ high-level width
HLDAK low-level width
Delay time from HLDAK↑ to bus output
Delay time from HLDRQ↓ to HLDAK↓
Delay time from HLDRQ↑ to HLDAK↑
(1) Multiplexed bus mode
Remarks 1. T = 1/f
(T
(a) CLKOUT asynchronous: In multiplexed bus mode
A
= −40 to +85°C, V
2. n: Number of wait clocks inserted in the bus cycle.
3. m = 0, 1
4. i: Number of idle states inserted after the read cycle (0 or 1).
5. The values in the above specifications are values for when clocks with a 1:1 duty ratio are input from
Parameter
The sampling timing changes when a programmable wait is inserted.
X1.
CPU
(f
DD
CPU
= AV
: CPU operation clock frequency)
CHAPTER 22 ELECTRICAL SPECIFICATIONS
DD
= EV
DD
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
DSTRDWR
DRDWRST
SAST
HSTA
FRDA
SAID
SRID
HRDID
DRDA
DRDST
WRDWRL
WSTH
DWROD
SODWR
HWROD
SAWT1
SAWT2
HAWT1
HAWT2
SSTWT1
SSTWT2
HSTWT1
HSTWT2
WHQH
WHAL
DHAC
DHQHA1
DHQHA2
User’s Manual U15905EJ2V1UD
= 2.2 to 2.7 V, V
Symbol
<13>
<14>
<15>
<16>
<17>
<18>
<19>
<20>
<21>
<22>
<23>
<24>
<25>
<26>
<27>
<28>
<29>
<30>
<31>
<32>
<33>
<34>
<35>
<36>
<37>
<38>
<39>
<40>
n ≥ 1
n ≥ 1
n ≥ 1
n ≥ 1
n ≥ 1
n ≥ 1
n ≥ 1
n ≥ 1
SS
Conditions
= AV
SS
= EV
SS
= 0 V, C
(1.5 + i)T − 15
(1 + n)T − 15
(1 + n)T − 20
(1 + i)T − 15
(0.5 + n)T
(1.5 + n)T
0.5T − 15
0.5T − 20
0.5T − 15
0.5T − 15
(1 + n)T
T − 15
T − 15
T + 10
T − 15
MIN.
0.5T
nT
−3
0
L
= 50 pF)
(2n + 7.5)T + 25
(1.5 + n)T − 30
(2 + n)T − 30
(1 + n)T − 25
(1 + n)T − 25
1.5T + 25
1.5T − 30
T − 25
MAX.
15
2
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
513