SAM3S4B Atmel Corporation, SAM3S4B Datasheet - Page 206
SAM3S4B
Manufacturer Part Number
SAM3S4B
Description
Manufacturer
Atmel Corporation
Specifications of SAM3S4B
Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
48
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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10.23.7
10.23.8
10.23.8.1
206
SAM3S
MPU mismatch
Updating an MPU region
Updating an MPU region using separate words
Table 10-39. AP encoding (Continued)
When an access violates the MPU permissions, the processor generates a memory manage-
ment fault, see
fault. See
To update the attributes for an MPU region, update the RNR, RBAR and RASR registers. You
can program each register separately, or use a multiple-word write to program all of these regis-
ters. You can use the RBAR and RASR aliases to program up to four regions simultaneously
using an STM instruction.
Simple code to configure one region:
Disable a region before writing new region settings to the MPU if you have previously enabled
the region being changed. For example:
Software must use memory barrier instructions:
AP[2:0]
101
110
111
; R1 = region number
; R2 = size/enable
; R3 = attributes
; R4 = address
LDR R0,=MPU_RNR
STR R1, [R0, #0x0]
STR R4, [R0, #0x4]
STRH R2, [R0, #0x8]
STRH R3, [R0, #0xA]
; R1 = region number
; R2 = size/enable
; R3 = attributes
; R4 = address
LDR R0,=MPU_RNR
STR R1, [R0, #0x0]
BIC R2, R2, #1
STRH R2, [R0, #0x8]
STR R4, [R0, #0x4]
STRH R3, [R0, #0xA]
ORR R2, #1
STRH R2, [R0, #0x8]
“Memory Management Fault Status Register” on page 182
Privileged
permissions
RO
RO
RO
“Exceptions and interrupts” on page
Unprivileged
permissions
No access
RO
RO
; 0xE000ED98, MPU region number register
; Region Number
; Region Base Address
; Region Size and Enable
; Region Attribute
; 0xE000ED98, MPU region number register
; Region Number
; Disable
; Region Size and Enable
; Region Base Address
; Region Attribute
; Enable
; Region Size and Enable
Description
Reads by privileged software only
Read only, by privileged or unprivileged software
Read only, by privileged or unprivileged software
52. The MMFSR indicates the cause of the
for more information.
6500C–ATARM–8-Feb-11
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