SAM3S4B Atmel Corporation, SAM3S4B Datasheet - Page 710

• Manufacturer Part Number: SAM3S4B
• Manufacturer: Atmel Corporation

Specifications of SAM3S4B

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 64 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 23
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 10
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 48
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

33.7.8.2
710
710
SAM3S
SAM3S
Baud Rate
In SPI Mode, the baudrate generator operates in the same way as in USART synchronous
mode:
some restrictions:
In SPI Master Mode:
In SPI Slave Mode:
• the external clock SCK must not be selected (USCLKS ≠ 0x3), and the bit CLKO must be set
• to obtain correct behavior of the receiver and the transmitter, the value programmed in CD
• if the internal clock divided (MCK/DIV) is selected, the value programmed in CD must be
• the external clock (SCK) selection is forced regardless of the value of the USCLKS field in the
• to obtain correct behavior of the receiver and the transmitter, the external clock (SCK)
to “1” in the Mode Register (US_MR), in order to generate correctly the serial clock on the
SCK pin.
must be superior or equal to 6.
even to ensure a 50:50 mark/space ratio on the SCK pin, this value can be odd if the internal
clock is selected (MCK).
Mode Register (US_MR). Likewise, the value written in US_BRGR has no effect, because
the clock is provided directly by the signal on the USART SCK pin.
frequency must be at least 6 times lower than the system clock.
See “Baud Rate in Synchronous Mode or SPI Mode” on page 683.
However, there are
6500C–ATARM–8-Feb-11
6500C–ATARM–8-Feb-11