mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 142

• Manufacturer Part Number: mcf5307cft90b
• Description: Mcf5307 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Programming Model
Table 5-12 describes PBR fields.
Figure 5-11 shows PBMR.
Table 5-13 describes PBMR fields.
5.4.7 Trigger Definition Register (TDR)
The TDR, shown in Table 5-12, configures the operation of the hardware breakpoint logic
that corresponds with the ABHR/ABLR/AATR, PBR/PBMR, and DBR/DBMR registers
within the debug module. The TDR controls the actions taken under the defined conditions.
Breakpoint logic may be configured as a one- or two-level trigger. TDR[31–16] define the
second-level trigger and bits 15–0 define the first-level trigger.
DRc[4–0]
5-14
31–0 Mask
31–0 Address PC breakpoint address. The 32-bit address to be compared with the PC as a breakpoint trigger.
Bits
Bits
DRc[4–0]
Reset
Field
R/W Write. PC breakpoint register is accessible in supervisor mode using the WDEBUG instruction and through
Reset
Field
R/W
Name
Name
the BDM port using the
Set Descriptions.”
31
Figure 5-11. Program Counter Breakpoint Mask Register (PBMR)
31
Write. PBMR is accessible in supervisor mode as debug control register 0x09 using the WDEBUG
PC breakpoint mask. A zero in a bit position causes the corresponding PBR bit to be compared to
the appropriate PC bit. Set PBMR bits cause PBR bits to be ignored.
Figure 5-10. Program Counter Breakpoint Register (PBR)
Freescale Semiconductor, Inc.
Table 5-13. PBMR Field Descriptions
instruction and via the BDM port using the wdmreg command.
For More Information On This Product,
RDMREG
Table 5-12. PBR Field Descriptions
and
Go to: www.freescale.com
MCF5307 User’s Manual
WDMREG
Program Counter
commands using values shown in Section 5.5.3.3, “Command
Description
Description
Mask
0x08
0x09
—
—
1
0
0