mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 163
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mcf5307cft90b
Manufacturer Part Number
mcf5307cft90b
Description
Mcf5307 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5307CFT90B.pdf
(484 pages)
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5.5.3.3.9 Synchronize PC to the PST/DDATA Lines (
The
outputs. After the debug module receives the command, it sends a signal to the ColdFire
processor that the current PC must be displayed. The processor then forces an instruction
fetch at the next PC with the address being captured in the DDATA logic under control of
CSR[BTB]. The specific sequence of PST and DDATA values is as follows:
The
monitoring. The execution of this command is considerably less obtrusive to the real-time
operation of an application than a
Command Formats:
Command Sequence:
Operand Data:
Result Data:
15
1. Debug signals a
2. CPU completes the current instruction.
3. CPU forces an instruction fetch to the next PC, generates a PST = 0x5 value
4. The instruction address corresponding to the PC is captured.
5. The PST marker (0x9–0xB) is generated and displayed as defined by CSR[BTB]
SYNC
SYNC
indicating a taken branch and signals the capture of DDATA.
followed by the captured PC address.
0x0
_
_
PC
PC
command captures the current PC and displays it on the PST/DDATA
command can be used to dynamically access the PC for performance
12
Figure 5-35.
None
Command complete status (0xFFFF) is returned when the register
write is complete.
SYNC
Figure 5-34.
Freescale Semiconductor, Inc.
11
For More Information On This Product,
_
PC
SYNC_PC
0x0
Chapter 5. Debug Support
command is pending.
Go to: www.freescale.com
NOP
HALT
???
SYNC
SYNC
-
CPU
_
8
PC
_
PC
/
READ
Command Sequence
Command Format
"CMD COMPLETE"
7
NEXT CMD
-
PC
/
RESUME
0x0
Background Debug Mode (BDM)
command sequence.
SYNC
4
_
3
PC
)
0x1
5-35
0
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