mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 418

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mcf5307cft90b

Manufacturer Part Number
mcf5307cft90b
Description
Mcf5307 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
General Operation of External Master Transfers
In Figure 18-30, the external device is bus master during C1 and C2, releasing control in
C3, at which time the external arbiter asserts BG to the MCF5307. During C4 and C5, the
MCF5307 is implicit master because no internal access is pending. In C5, an internal bus
request becomes pending, causing the MCF5307 to take explicit bus mastership in C6 by
asserting BR and BD. In C7, the external device removes the bus grant to the MCF5307.
The MCF5307 does not release the bus (the MCF5307 asserts BD) until the transfer ends.
18-30
SIZ[1:0], TM[2:0]
A[31:0], TT[1:0]
Figure 18-30. Three-Wire Implicit and Explicit Bus Mastership
BCLKO
D[31:0]
The MCF5307 can start a transfer in the cycle after BG is
asserted. The external arbiter should not assert BG to the
MCF5307 until the previous external master stops driving the
bus. Asserting BG during another external master’s transfer
may damage the part.
R/W
TIP
BR
BG
BD
AS
TS
TA
Freescale Semiconductor, Inc.
C1
External Master
For More Information On This Product,
C2
Go to: www.freescale.com
MCF5307 User’s Manual
C3
NOTE:
C4
Mastership
Implicit
C5
C6
MCF5307
C7
Mastership
Explicit
C8
C9

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