mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 86

• Manufacturer Part Number: mcf5307cft90b
• Description: Mcf5307 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

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wdebug.l
Instruction Timing
2.7.5 Branch Instruction Execution Times
Table 2-16 shows general branch instruction timing.
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For the conditional branch opcodes (bcc), a static algorithm is used to determine the
prediction state of the branch. This algorithm is:
if bcc is a forward branch && CCR[7] == 0
Opcode
wddata.l
2-46
trapf.w
Opcode
If a MOVE.W #imm,SR instruction is executed and #imm[13] = 1, the execution time is 1(0/0).
n is the number of registers moved by the MOVEM opcode.
PEA execution times are the same for (d16,PC).
PEA execution times are the same for (d8,PC,Xi*SF).
The execution time for STOP is the time required until the processor begins sampling continuously for
interrupts.
trapf.l
pulse
stop
trapf
unlk
nop
pea
trap
Assumes branch acceleration. Depending on the pipeline status, execution times may vary from 1 to 3 cycles.
jmp
bra
bsr
rte
rts
jsr
Table 2-15. Miscellaneous Instruction Execution Times (Continued)
then the bcc is predicted as not-taken
Í
Í
Í
#imm
#imm
Í
Í
Í
Í
Ax
Table 2-16. General Branch Instruction Execution Times
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Rn
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3(0/0)
1(0/0)
1(0/0)
1(0/0)
1(0/0)
3(1/0)
5(0/0)
5(0/1)
Rn
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Freescale Semiconductor, Inc.
For More Information On This Product,
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Go to: www.freescale.com
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MCF5307 User’s Manual
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(d8,An,Xi*SF) (xxx).wl
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