mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 7

• Manufacturer Part Number: mcf5307cft90b
• Description: Mcf5307 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

2.7.5
2.8
2.8.1
2.8.2
3.1
3.1.1
3.1.2
3.1.3
3.1.4
3.2
4.1
4.2
4.3
4.4
4.4.1
4.5
4.5.1
4.6
4.7
4.8
4.8.1
4.8.2
4.9
4.9.1
4.9.1.1
4.9.1.2
4.9.1.3
4.9.2
4.9.3
4.9.3.1
4.9.3.2
4.9.3.3
4.9.3.4
4.9.4
Paragraph
Number
Exception Processing Overview ....................................................................... 2-47
Overview............................................................................................................. 3-1
MAC Instruction Execution Timings.................................................................. 3-5
Interactions between Local Memory Modules ................................................... 4-1
SRAM Overview ................................................................................................ 4-1
SRAM Operation ................................................................................................ 4-2
SRAM Programming Model............................................................................... 4-3
SRAM Initialization............................................................................................ 4-4
Power Management ............................................................................................ 4-6
Cache Overview.................................................................................................. 4-6
Cache Organization............................................................................................. 4-7
Cache Operation................................................................................................ 4-11
Branch Instruction Execution Times ............................................................ 2-46
Exception Stack Frame Definition................................................................ 2-49
Processor Exceptions .................................................................................... 2-50
MAC Programming Model............................................................................. 3-2
General Operation........................................................................................... 3-3
MAC Instruction Set Summary ...................................................................... 3-4
Data Representation........................................................................................ 3-4
SRAM Base Address Register (RAMBAR)................................................... 4-3
SRAM Initialization Code .............................................................................. 4-5
Cache Line States: Invalid, Valid-Unmodified, and Valid-Modified............. 4-8
The Cache at Start-Up..................................................................................... 4-9
Caching Modes ............................................................................................. 4-13
Cache-Inhibited Accesses ............................................................................. 4-14
Cache Protocol.............................................................................................. 4-15
Cache Coherency ......................................................................................... 4-17
Cacheable Accesses .................................................................................. 4-13
Write-Through Mode ............................................................................... 4-14
Copyback Mode ....................................................................................... 4-14
Read Miss ................................................................................................. 4-15
Write Miss ............................................................................................... 4-16
Read Hit .................................................................................................... 4-16
Write Hit .................................................................................................. 4-16
Hardware Multiply/Accumulate (MAC) Unit
Freescale Semiconductor, Inc.
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CONTENTS
Local Memory
Chapter 3
Chapter 4
Contents
Title
Number
Page
vii