mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 415

• Manufacturer Part Number: mcf5307cft90b
• Description: Mcf5307 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

In Figure 18-28, the external device is master during C1 and C2. It releases bus control in
C3 by asserting BG to the MCF5307. During C4 and C5, the MCF5307 is implicit master
because no internal access is pending. In C5, an internal bus request becomes pending,
causing the MCF5307 to become explicit bus master in C6 by asserting BD. In C7, the
external device removes the bus grant to the MCF5307. The MCF5307 does not release the
bus (the MCF5307 continues to assert BD) until the transfer ends.
Chapter 5, “Debug Support is a MCF5307 bus arbitration state diagram. States are
described in Table 18-6.
SIZ[1:0], TM[2:0]
A[31:0], TT[1:0]
BCLKO
Figure 18-28. Two-Wire Implicit and Explicit Bus Mastership
D[31:0]
The MCF5307 can start a transfer in the clock cycle after BG
is asserted. The external master must not assert BG to the
MCF5307 while driving the bus or the part may be damaged.
R/W
TIP
BG
BD
TS
AS
TA
C1
Freescale Semiconductor, Inc.
External Master
For More Information On This Product,
C2
Chapter 18. Bus Operation
Go to: www.freescale.com
C3
NOTE:
C4
Mastership
Implicit
General Operation of External Master Transfers
C5
C6
MCF5307
C7
Mastership
Explicit
C8
C9
18-27