tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 160

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tmp19a61f10xbg

Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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7.20 Port J (PJ0~PJ7)
The port J is a general-purpose, 8-bit input/output port. For this port, inputs and outputs can
be specified in units of bits. Outputs can be set by using the control register PJCR. A reset
allows all bits of the PJ and PJCR to be cleared to "0," and the port J to be put in output
disable mode.
PJ read
(Output control)
(Input control)
(Output latch)
PJCR
PJIE
PJ
TMP19A61(rev1.0) 7-159
Fig. 7.41 Port J (PJ0~PJ7)
STOP/RESET
drive disable
0
1
TMP19A61
Port J
PJ0~PJ7

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