tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 494

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

21.3.3 Boundary Scan Register
21.3.4 Test Access Port (TAP)
296
3
TCK
Instruction register
TMS and TDI are sampled on the rising
edge of TCK.
Bypass register
Boundary scan
Data is serially scanned in.
register
The boundary scan register has all the inputs and outputs for TMP19A61 except for some
analog output signals and the control signals. Pins of the TMP19A61 can drive any test patterns
by scanning data into the boundary scan register in the Shift-DR state. After the boundary scan
register goes into the Capture-DR state, data enters the processor, is shifted, and inspected.
The boundary scan register forms a data path. It basically functions as a single shift register of
297-bit width. Cells in this data path are connected to all input and output pads of the
TMP19A61.
The TDI input is introduced to the least significant bit (LSB) in the boundary scan register. The
most significant bit in the boundary scan register is taken out of the TDO output.
The test access port (TAP) consists of five signal pins: TRST , TDI, TDO, TMS, and TCK. Serial
test data, instructions and test control signals are sent and received through these signal pins.
Data is serially scanned into one of three registers (instruction register, bypass register and
boundary scan register) via the TDI pin or it is scanned out from one of these three registers into
the TDO pin, as shown in Fig. 21.6.
The TMS input is used to control the state transitions of the main TAP controller state machine.
The TCK input is a test clock exclusively for shifting serial JTAG data synchronously; it works
independently of a chip core clock or a system clock.
Data through the TDI and TMS pins are sampled on the rising edge of the input clock signal TCK.
Data through the TDO pin changes on the falling edge of the clock signal TCK.
0
0
0
Fig. 21.6 JTAG Test Access Port
TMP19A61 (rev1.0)21 -493
TDI pin
TMS pin
296
3
Instruction register
Bypass register
Boundary scan
register
Data is serially scanned out.
TDO is sampled on the falling edge
of TCK.
0
0
0
TMP19A61
TDO pin