tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 45

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tmp19a61f10xbg

Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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(Note) A software interrupt is accepted in no less than three clocks after the instruction that enabled
the interrupt and the PC at the time of acceptance is stored in EPC.
Read INTUNIT to determine the factor of generation when a
Read Cause <IP[1:0]> to determine the factor of generation
Fig. 6.2 Example of Software Interrupt Operation
Automatically jump to exception vector address
Set Cause <IP[1:0]> =1 to generate interrupt
Set Cause <IP[1:0]> = 0 to clear interrupt
Return to interrupt generation address
group of interrupts is generated
Save registers as necessary
Restore necessary registers
TMP19A61(rev1.0)-6-44
Jump to interrupt handler
Interrupt processing
ERET instruction
TMP19A61
Processed by user
software
Processed by user
software
Processed by
TX19A core

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