tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 33

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

5.8.3 Releasing the Standby State
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The standby state can be released by an interrupt request when the interrupt level is higher
than the interrupt mask level, or by the reset. The standby release source that can be used
is determined by a combination of the standby mode and the state of the interrupt mask
register <IM15:8> assigned to the status register in the system control coprocessor (CPO)
of the TX19A processor core. Details are shown in Table 5.8.3 Standby Release Sources
and Standby Release Operations.
Release by an interrupt request
Operations of releasing the standby state using an interrupt request vary depending on the
interrupt enabled state. If the interrupt level specified before the system enters the standby
mode is equal to or higher than the value of the interrupt mask register, an interrupt handling
operation is executed by the trigger after the standby is released, and the processing is
started at the instruction next to the standby shift instruction (WAIT instruction). If the
interrupt request level is lower than the value of the interrupt mask register, the processing
is started with the instruction next to the standby shift instruction (WAIT instruction) without
executing an interrupt handling operation. (The interrupt request flag is maintained at "1.")
For a non-maskable interrupt, an interrupt handling is executed after the standby state is
released irrespectively of the mask register value.
Release by the reset
Any standby state can be released by the reset. It initializes the setting (the precedent status
of the stand-by is maintained in the case of release by the interrupt).
Note that releasing of the STOP mode requires sufficient reset time to allow the oscillator
operation to become stable (it must be longer than “the time required for stable oscillation +
500 μ s”).
Please refer to "6. Interrupt" for details of interrupts for STOP and IDLE release and
ordinary interrupts
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