tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 503
tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
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21.5 Points to Note
21.4.3 BYPASS instruction
This section describes the points to note regarding JTAG boundary scan operations implemented in
this processor.
•
•
The X2 and X1 signal pads do not comply with JTAG.
To reset the JTAG circuit, execute either of the following:
When conducting the type of test in which an IC does not need to be controlled or monitored, the
BYPASS instruction is used to form the shortest serial path bypassing an IC by connecting the
bypass register between JTDI and JTDO. The BYPASS instruction does not affect the normal
operation of the system logic implemented on a chip. Data passes through the bypass register
while the BYPASS instruction is selected, as shown in Fig. 21.11.
Initialize the JTAG circuit by asserting TRST , and then negate TRST .
Set the TMS pin to "1," and supply TCK with more than 5 clocks.
TDI
Fig. 21.11 Flow of Data While the Bypass Register Is Selected
TMP19A61 (rev1.0)21-502
Bypass register
1 bit
TDO
TMP19A61
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