tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 549

• Manufacturer Part Number: tmp19a61f10xbg
• Description: 32-bit Tx System Risc Tx19 Family
• Manufacturer: TOSHIBA Semiconductor CORPORATION

24.7 AC Electrical Characteristics
［1］Separate bus mode
(Note) No. 1 to 14:
No.
10
11
12
13
14
1
2
3
4
5
6
7
8
9
System clock period (x)
A0-23 valid to RD / WR /HWR
asserted
A0 − 23 hold after RD / WR or
HWR negated
A0 − 23valid to D0 − 15data in
D0 − 15 hold after RD negated
valid
D0-15 valid to WR /HWR negated
D0 − 15 hold after WR /HWR rising
A0 - 23 valid to WAIT input
BUSCR<ALESEL>=”00”, 2 programmed wait state
(1)DVCC15=CVCC15=1.35V~1.65V, DVCC3n=2.3V~3.3V
RD asserted to D0 − 15 data in
RD pulse width low
RD negated to A0 − 23 output
WR /HWR pulse width low
WR or HWR asserted to D0-15
WAIT hold after RD / WR /HWR
Internal 2 wait insertion, ALE “1” Clock，@54MHz
TW = W + 2N,
ALE=ALE output width
No. 21
(2W+2N)
TW = 2 + 2*1 = 4
AC measurement conditions:
Output levels: High = 0.8DVCC33 V/Low 0.2DVCC33 V, CL = 30 pF
Input levels:High = 0.7DVCC33 V/Low 0.3DVCC33 V
Parameter
TMP19A61 (rev 1.0)-24-548
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
SYS
AC
CAR
AD
RD
RR
HR
RAE
WW
DO
DW
WD
AW
CW
(1+ALE)x-20
x(1+W)-10
x(1+W)-10
x(1+W)-18
x(TW-3)-1
x−15
18.5
x-14
x-15
Min
0
Equation
x(2+W+ALE)-
x(TW-1)-30
x+(ALE)x+
x(1+W)-28
(w-1)x-30
12.3
Max
42
45.5
45.5
37.5
17.5
TMP19A61
Min
4.5
3.5
3.5
54 MHz (fsys)
17
0
50.5
27.5
12.3
25.5
25.5
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns