tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 196
tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
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Part Number:
TMP19A61F10XBG
Manufacturer:
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8.2
(3)
Data Format
When an internal area is being accessed, the address bus maintains the address output of the
previously accessed external area and doesn't change it. Also, the data bus is in a state of
high impedance.
Internal registers and external bus interfaces of the TMP19A61 are configured as described
below.
(1) Big-endian mode
Address HOLD when an internal area is accessed
Word access
●
●
●
32-bit bus width
8-bit bus width
16-bit bus width
Half word access
Internal registers
D31 AA x0
D00 DD x3
D31 AA x0
D00 DD x3
D31
D00 BB x1
Internal registers
Internal registers
CC x2
BB x1
BB x1
CC x2
AA x0
TMP19A61(rev1.0)-8-195
address
address
address
MSB LSB
MSB LSB
AA
x0
AABB
AABB
A1=0
External buses
External buses
External buses
BB CC DD
x1
CCDD
x2
A1=1
x3
TMP19A61
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