tmp19a61f10xbg TOSHIBA Semiconductor CORPORATION, tmp19a61f10xbg Datasheet - Page 303
tmp19a61f10xbg
Manufacturer Part Number
tmp19a61f10xbg
Description
32-bit Tx System Risc Tx19 Family
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP19A61F10XBG.pdf
(575 pages)
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TMP19A61F10XBG
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12.2.2
12.2.3
The noise removal circuit removes noises from an external clock source input (TBTIN) and
a capture trigger input (TCnIN) of the time base timer (TBTA). It can also output input
signals without removing noises from them.
This is a 32-bit binary counter that counts up upon the rising of an input clock specified by
the TBTA control register TBTACR.
Based on the TBTCR<TBTCLK3 : 0> setting, an input clock is selected from external
clocks supplied through the TBTIN1 pin and eight prescaler output clocks φT2, φT4, φT8,
φT16, φT32, φT64, φT128, and φT256.
However, a counter value cannot be read (captured) if the register is accessed in units of 8
"Count," "stop" or "clear" of the up-counter can be selected with TBTARUN<TBTRUN>.
When a reset is performed, the up-counter is in a cleared state and the timer is in an idle
state. As counting starts, the up-counter operates in a free-running condition. As it reaches
an overflow state, the overflow interrupt INTTBT is generated; subsequently, the count
value is cleared to 0 and the up-counter restarts a count-up operation. INTTBTA is
controlled by CAPINT and CMPINT that categorized in the same group as INTCAPn
described in the part of 32-bit capture register.
This counter can perform a read capture operation. When it is performing a read capture
operation, it is possible to read a counter value by accessing the TBTA read capture register
(TBTARDCAP) in units of 32 bits.
or 16 bits.
Noise Removal Circuit
32-bit Time Base Timer (TBT)
TMP19A61 (rev1.0)-12-302
TMP19A61
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