s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 182

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s3c2410a

Manufacturer Part Number
s3c2410a
Description
16/32-bit Risc Arm Microprocessor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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THUMB INSTRUCTION SET
FORMAT 17: SOFTWARE INTERRUPT
OPERATION
The SWI instruction performs a software interrupt. On taking the SWI, the processor switches into ARM state and
enters Supervisor (SVC) mode.
The THUMB assembler syntax for this instruction is shown below.
NOTE:
INSTRUCTION CYCLE TIMES
All instructions in this format have an equivalent ARM instruction as shown in Table 4-18. The instruction cycle times
for the THUMB instruction are identical to that of the equivalent ARM instruction.
EXAMPLES
4-36
SWI Value 8
THUMB assembler
Value8 is used solely by the SWI handler; it is ignored by the processor.
15
1
SWI 18
14
1
13
0
12
1
SWI Value 8
11
1
ARM equivalent
Table 4-18. The SWI Instruction
10
1
Figure 4-18. Format 17
[7:0] Comment Field
9
1
8
1
; Take the software interrupt exception.
; Enter Supervisor mode with 18 as the
; requested SWI number.
7
Perform Software Interrupt:
Move the address of the next instruction into LR,
move CPSR to SPSR, load the SWI vector address
(0x8) into the PC. Switch to ARM state and enter
SVC mode.
Value 8
Action
0
S3C2410A

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