s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 571

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

ARM920T PROCESSOR
DOMAIN ACCESS CONTROL
MMU accesses are primarily controlled via domains. There are 16 domains and each has a 2-bit field to define
access to it. Two types of user are supported, clients and managers. See Table 3-5. The domains are defined in the
domain access control register. Figure 3-10 illustrates how the 32 bits of the register are allocated to define the 16 2-
bit domains.
Table 3-5 defines how the bits within each domain are interpreted to specify the access permissions
Value
31
00
01
10
11
15
30
29
Table 3-5. Interpreting Access Control Bits in Domain Access Control Register
14
28
27
13
No Access
Client
Reserved
Manager
26 25 24 23
Meaning
12
Figure 3-10. Domain Access Control Register Format
11
22
21 20
10
Any access will generate a domain fault.
Accesses are checked against the access permission bits in the
section or page descriptor.
Reserved. Currently behaves like the no access mode.
Accesses are not checked against the access permission bits so a
permission fault cannot be generated.
19
9
18
17
8
16
15
7
14
13
6
12
11
5
10 9
Notes
4
8 7
3
6
5
2
4 3
1
2 1
0
0
MMU
3-19