s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 341

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s3c2410a

Manufacturer Part Number
s3c2410a
Description
16/32-bit Risc Arm Microprocessor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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S3C2410A
END POINT OUT CONTROL STATUS REGISTER (OUT_CSR1_REG/OUT_CSR2_REG) (Continued)
OUT_CSR2_REG
AUTO_CLR
ISO
OUT_DMA_INT_
MASK
OUT_CSR2_REG
Register
0x52000197(B)
0x52000194(L)
Bit
[7]
[6]
[5]
Address
MCU
R/W
R/W
R/W
(byte)
R/W
R/W
USB
R
R
R
End Point out control status register2
If the MCU is set, whenever the MCU reads
data from the OUT FIFO, OUT_PKT_RDY will
automatically be cleared by the logic without
any intervention from the MCU.
Determine endpoint transfer type.
0: Configures endpoint to Bulk mode.
1: Reserved
Determine whether the interrupt should be
issued or not.
OUT_PKT_RDY condition happens. This is
only useful for DMA mode
0 = Interrupt Enable
Description
Description
1 = Interrupt Disable
Reset Value
Initial State
USB DEVICE
0x00
0
0
0
13-17

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