s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 340

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

USB DEVICE
END POINT OUT CONTROL STATUS REGISTER (OUT_CSR1_REG/OUT_CSR2_REG)
13-16
OUT_CSR1_REG
CLR_DATA_
TOGGLE
SENT_STALL
SEND_STALL
FIFO_FLUSH
Reserved
OUT_PKT_RDY
OUT_CSR1_REG
Register
[3:1]
0x52000193(B)
0x52000190(L)
Bit
[7]
[6]
[5]
[4]
[0]
Address
CLEAR
CLEAR
MCU
R/W
R/W
R/W
R/
R/
–
CLEAR
CLEAR
(byte)
R/W
R/W
USB
SET
SET
R
–
End Point out control status register1
When the MCU writes a 1 to this bit, the data
toggle sequence bit is reset to DATA0.
Set by the USB when an OUT token is ended
with a STALL handshake. The USB issues a
stall handshake to the host if it sends more
than MAXP data for the OUT TOKEN.
0: The MCU clears this bit to end the STALL
condition handshake, IN PKT RDY is cleared.
1: The MCU issues a STALL handshake to
the USB. The MCU clears this bit to end
the STALL condition handshake, IN PKT RDY
is cleared.
The MCU writes a 1 to flush the FIFO.
This bit can be set only when OUT_PKT_RDY
(D0) is set. The packet due to be unloaded by
the MCU will be flushed.
Set by the USB after it has loaded a packet of
data into the FIFO. Once the MCU reads the
packet from FIFO, this bit should be cleared
by MCU (write a "0").
Description
Description
–
Reset Value
Initial State
S3C2410A
0x00
0
0
0
0
0
0