s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 213

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

S3C2410A
AUTO BOOT MODE SEQUENCE
1. Reset is completed.
2. When the auto boot mode is enabled, the first 4 KBytes of NAND flash memory is copied onto Steppingstone 4-
3. The Steppingstone is mapped to nGCS0.
4. CPU starts to execute the boot code on the Steppingstone 4-KB internal buffer.
NAND FLASH MODE CONFIGURATION
1. Set NAND flash configuration by NFCONF register.
2. Write NAND flash command onto NFCMD register.
3. Write NAND flash address onto NFADDR register.
4. Read/Write data while checking NAND flash status by NFSTAT register. R/nB signal should be checked before
NAND FLASH MEMORY TIMING
KB internal buffer.
In the auto boot mode, ECC is not checked. So, The first 4 KBytes of NAND flash should have no bit error.
read operation or after program operation.
CLE/ALE
HCLK
nWE
Figure 6-3. TACLS = 0, TWRPH0 = 1, TWRPH1 = 0
TACLS
NOTE
TWRPH0
TWRPH1
NAND FLASH CONTROLLER
6-3