s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 332

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s3c2410a

Manufacturer Part Number
s3c2410a
Description
16/32-bit Risc Arm Microprocessor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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USB DEVICE
INTERRUPT REGISTER (EP_INT_REG/USB_INT_REG) (Continued)
NOTE:
13-8
USB_INT_REG
RESET Interrupt
RESUME Interrupt
SUSPEND Interrupt
USB_INT_REG
Register
If the RESET interrupt is occurred, all USB device registers should be re-configured.
0x5200015B(B)
0x52000158(L)
Bit
[2]
[1]
[0]
Address
/CLEAR
/CLEAR
/CLEAR
MCU
R
R
R
(byte)
R/W
R/W
USB
SET
SET
SET
USB interrupt pending/clear register
Set by the USB when it receives reset
signaling.
Set by the USB when it receives resume
signaling, while in Suspend mode.
If the resume occurs due to a USB reset,
then the MCU is first interrupted with a
RESUME interrupt. Once the clocks
resume and the SE0 condition persists for
3ms, USB RESET interrupt will be
asserted.
Set by the USB when it receives suspend
signalizing.
This bit is set whenever there is no activity
for 3ms on the bus. Thus, if the MCU does
not stop the clock after the first suspend
interrupt, it will continue to be interrupted
every 3ms as long as there is no activity on
the USB bus.
By default, this interrupt is disabled.
Description
Description
Reset Value
Initial State
S3C2410A
0x00
0
0
0

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