s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 449

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

S3C2410A
SDI FIFO Status (SDIFSTA) Register
SDIFSTA
FIFO available
Detect for Tx
(TFDET)
FIFO available
Detect for Rx
(RFDET)
Tx FIFO Half Full
(TFHalf)
Tx FIFO Empty
(TFEmpty)
Rx FIFO Last Data
Ready (RFLast)
Rx FIFO Full
(RFFull)
Rx FIFO Half Full
(RFHalf)
FIFO Count
(FFCNT)
Register
SDIFSTA
0x5A000038
Address
[6:0]
[13]
[12]
[11]
[10]
Bit
[9]
[8]
[7]
Indicate that FIFO data is available for transmission when
DatMode (SDIDCON[12]) is data transmit mode. If DMA mode is
enable, SD host requests DMA operation.
0 = not detect (FIFO full),
Indicate that FIFO data is available for reception when DatMode
(SDIDCON[12]) is data receive mode. If DMA mode is enable, SD
host requests DMA operation.
0 = not detect(FIFO empty), 1 = detect(1
Set to 1 whenever Tx FIFO is less than 33byte.
0 = 33
Set to 1 whenever Tx FIFO is empty.
0 = 1
Set to 1 whenever Rx FIFO has last data of all block.
0 = not received yet,
Set to 1 whenever Rx FIFO is full.
0 = 0
Set to 1 whenever Rx FIFO is more than 31byte.
0 = 0
Number of data (byte) in FIFO
R/W
Tx FIFO
Tx FIFO
Rx FIFO
Rx FIFO
R
SDI FIFO status register
64,
64,
63,
31,
Description
1 = 0
1 = detect(0
1 = Empty(0byte)
1 = Last data ready
1 = 32
1 = Full(64byte)
Description
Tx FIFO
Rx FIFO
FIFO
FIFO
MMC/SD/SDIO HOST CONTROLLER
32
64
64)
63)
Reset Value
Initial State
0000000
0x0
0
0
0
0
0
0
0
19-13