s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 396

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s3c2410a

Manufacturer Part Number
s3c2410a
Description
16/32-bit Risc Arm Microprocessor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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LCD CONTROLLER
LCD Control 5 Register
15-30
LCDCON5
Reserved
VSTATUS
HSTATUS
BPP24BL
FRM565
INVVCLK
INVVLINE
INVVFRAME
INVVD
Register
LCDCON5
0X4D000010
Address
[31:17]
[16:15]
[14:13]
[12]
[11]
[10]
Bit
[9]
[8]
[7]
This bit is reserved and the value should be '0'.
TFT: Vertical Status (read only).
00 = VSYNC
10 = ACTIVE
TFT: Horizontal Status (read only).
00 = HSYNC
10 = ACTIVE
TFT: This bit determines the order of 24 bpp video memory.
0 = LSB valid
TFT: This bit selects the format of 16 bpp output video data.
0 = 5:5:5:1 Format
STN/TFT: This bit controls the polarity of the VCLK active edge.
0 = The video data is fetched at VCLK falling edge
1 = The video data is fetched at VCLK rising edge
STN/TFT: This bit indicates the VLINE/HSYNC pulse polarity.
0 = Normal
1 = Inverted
STN/TFT: This bit indicates the VFRAME/VSYNC pulse
polarity.
0 = Normal
1 = Inverted
STN/TFT: This bit indicates the VD (video data) pulse polarity.
0 = Normal
1 = VD is inverted.
R/W
R/W
LCD control 5 register
Description
Description
11 = FRONT Porch
11 = FRONT Porch
01 = BACK Porch
1 = 5:6:5 Format
01 = BACK Porch
1 = MSB Valid
Reset Value
0x00000000
Initial state
S3C2410A
00
00
0
0
0
0
0
0
0

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