s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 308

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

UART
UART Error Status FIFO
UART has the error status FIFO besides the Rx FIFO register. The error status FIFO indicates which data, among
FIFO registers, is received with an error. The error interrupt will be issued only when the data, which has an error, is
ready to read out. To clear the error status FIFO, the URXHn with an error and UERSTATn must be read out.
For example,
It is assumed that the UART Rx FIFO receives A, B, C, and D characters sequentially and the frame error occurs
while receiving 'B'.
The actual UART receive error will not generate any error interrupt because the character, which was received with an
error, has not been read yet. The error interrupt will occur when the character is read out.
Figure 11-3 shows the UART receiving the four characters including the one error.
11-6
Time
#0
#1
#2
#3
#4
#5
When no character is read out
A, B, C, and D is received
After A is read out
After B is read out
After C is read out
After D is read out
Sequence Flow
RX-FIFO
'D'
'C'
'B'
'A'
-
-
-
-
-
-
-
-
-
-
-
-
Figure 11-3. UART Receiving 4 Characters with 1 Error
URXHn
The frame error (in B) interrupt occurs.
UERSTATn
Error Interrupt
–
–
–
–
–
Error Status Generator Unit
Error Status-FIFO
Frame Error
The 'B' has to be read out.
Note
S3C2410A