s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 331

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

S3C2410A
INTERRUPT REGISTER (EP_INT_REG/USB_INT_REG)
The USB core has two interrupt registers.
These registers act as status registers for the MCU when it is interrupted. The bits are cleared by writing a "1" (not
"0") to each bit that was set.
Once the MCU is interrupted, MCU should read the contents of interrupt-related registers and write back to clear the
contents if it is necessary.
EP_INT_REG
EP1~EP4 Interrupt
EP0 Interrupt
EP_INT_REG
Register
[4:1]
0x5200014B(B)
Bit
[0]
0x52000148(L)
Address
/CLEAR
/CLEAR
MCU
R
R
USB
SET
SET
(byte)
R/W
R/W
For BULK/INTERRUPT IN endpoints:
Set by the USB under the following conditions:
1. IN_PKT_RDY bit is cleared.
2. FIFO is flushed
3. SENT_STALL set.
For BULK/INTERRUPT OUT endpoints:
Set by the USB under the following conditions:
1. Sets OUT_PKT_RDY bit
2. Sets SENT_STALL bit
Correspond to endpoint 0 interrupt.
Set by the USB under the following conditions:
1. OUT_PKT_RDY bit is set.
2. IN_PKT_RDY bit is cleared.
3. SENT_STALL bit is set
4. SETUP_END bit is set
5. DATA_END bit is cleared
NOTE: Conditions 1 and 2 are mutually exclusive.
(it indicates the end of control transfer).
EP interrupt pending/clear register
Description
Description
Reset Value
Initial State
USB DEVICE
0x00
0
0
13-7