s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 20
s3c2410a
Manufacturer Part Number
s3c2410a
Description
16/32-bit Risc Arm Microprocessor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C2410A.pdf
(599 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
s3c2410a-20
Manufacturer:
SAMSUNG
Quantity:
15 995
Company:
Part Number:
s3c2410a-20
Manufacturer:
SUNMNG
Quantity:
2 000
Company:
Part Number:
s3c2410a-20-Y080
Manufacturer:
SAMSUNG
Quantity:
2 890
Company:
Part Number:
s3c2410a-20-Y0R0
Manufacturer:
SAMSUNG
Quantity:
523
Part Number:
s3c2410a20-Y080
Manufacturer:
SAMSUNG/三星
Quantity:
20 000
- Current page: 20 of 599
- Download datasheet (3Mb)
Appendix 3- MMU
Appendix 4- Caches, Write Buffer
Appendix 5- Clock Modes
S3C2410A MICROPROCESSOR
Level Two Descriptor............................................................................................................................3-11
Translating Large Page References .......................................................................................................3-12
Translating Small Page References .......................................................................................................3-14
Translating Tiny Page References .........................................................................................................3-15
Sub-Pages..........................................................................................................................................3-17
Mmu Faults and CPU Aborts................................................................................................................3-17
Fault Address and Fault Status Registers..............................................................................................3-18
Domain Access Control .......................................................................................................................3-19
Fault Checking Sequence ....................................................................................................................3-21
External Aborts ...................................................................................................................................3-24
Interaction of the MMU and Caches.......................................................................................................3-25
About the Caches and Write Buffer .......................................................................................................4-1
Instruction Cache ................................................................................................................................4-2
Data Cache and Write Buffer ................................................................................................................4-5
Cache Coherence................................................................................................................................4-10
Cache Cleaning when Lockdown is in Use.............................................................................................4-12
Implementation Notes ..........................................................................................................................4-12
Physical Address TAG RAM ................................................................................................................4-12
Overview .............................................................................................................................................5-1
Fastbus Mode.....................................................................................................................................5-2
Synchronous Mode..............................................................................................................................5-2
Asynchronous Mode............................................................................................................................5-3
Fault Status ................................................................................................................................3-18
Alignment Fault...........................................................................................................................3-22
Translation Fault..........................................................................................................................3-22
Domain Fault ..............................................................................................................................3-22
Permission Fault .........................................................................................................................3-23
Enabling the MMU.......................................................................................................................3-25
Disabling the MMU......................................................................................................................3-25
Instruction Cache Enable/Disable..................................................................................................4-3
Instruction Cache Operation .........................................................................................................4-3
Instruction Cache Replacement Algorithm......................................................................................4-4
Instruction Cache Lockdown.........................................................................................................4-4
Data Cache and Write Buffer Enable/Disable..................................................................................4-6
Data Cache and Write Buffer Operation .........................................................................................4-6
Data Cache Replacement Algorithm..............................................................................................4-8
Swap Instructions ........................................................................................................................4-8
Data Cache Organization .............................................................................................................4-9
Data Cache Lockdown .................................................................................................................4-9
(Continued)
Table of Contents
(Concluded)
xix
Related parts for s3c2410a
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Transistor,mosfet,n-channel,200v V Br Dss,5.9a
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet:
Part Number:
Description:
Samsung Power Switch
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet:
Part Number:
Description:
Samsung Pm410 Ssd 1.8 Lif 128/64gb
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet:
Part Number:
Description:
Low Voltage Audio Power Amp
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet:
Part Number:
Description:
Dual Equalizer Amplifier With Alc
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet:
Part Number:
Description:
Low Dropout Voltage Regulator
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet:
Part Number:
Description:
1 Chip Codec For Digital Answering Phone
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet:
Part Number:
Description:
10/15 Ch Pll
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet:
Part Number:
Description:
Flextm Roaming Decoder Ii
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet:
Part Number:
Description:
128k X 8bit Low Power And Low Voltage Cmos Statinc Ram
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet:
Part Number:
Description:
Ballast/backlight Controller/driver,sop,20pin,plastic
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet:
Part Number:
Description:
3 Channel R.g.b Video Amplifier
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet:
Part Number:
Description:
Rgb Encoder For Pal/ntsc
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet:
Part Number:
Description:
R/g/b Video Amplifier With Osd Interface For Monitors
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet:
Part Number:
Description:
Remote Control Preamplifier
Manufacturer:
Samsung Semiconductor, Inc.
Datasheet: