s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 236

• Manufacturer Part Number: s3c2410a
• Description: 16/32-bit Risc Arm Microprocessor
• Manufacturer: Samsung Semiconductor, Inc.

CLOCK & POWER MANAGEMENT
Output Port State and Power_OFF Mode
The output port should have a proper logic level in power off mode, which makes the current consumption minimized.
If there is no load on an output port pin, H level is preferred. If output is L, the current will be consumed through the
internal parasitic resistance; if the output is H, the current will not be consumed. For an output port, the current
consumption can be reduced if the output state is H.
Battery Fault Signal(nBATT_FLT)
There are two functions in nBATT_FLT pin as follows;
— When CPU is not in Power_OFF mode, nBATT_FLT pin will cause the interrupt request. The interrupt attribute of
— While CPU is in Power_OFF mode, assertion of the nBATT_FLT will prohibit the wake up from the power-down
ADC Power Down
The ADC has an additional power-down bit in ADCCON. If the S3C2410A enters the Power_OFF mode, the ADC
should enter its own power-down mode.
S/W Work-Around
After 'wake-up' from the Power_OFF mode by RTC_ALARM, the RTC source pending bit of the SRCPND register is
not set. So, the ALARM date has to be checked after the wake-up from Power_OFF mode.
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the nBATT_FLT is L-level triggered.
mode. So, Any wake-up source will be masked if nBATT_FLT is asserted, which is protecting the system
malfunction of the low battery capacity
S3C2410A