s3c2410a Samsung Semiconductor, Inc., s3c2410a Datasheet - Page 94

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s3c2410a

Manufacturer Part Number
s3c2410a
Description
16/32-bit Risc Arm Microprocessor
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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ARM INSTRUCTION SET
SHIFTS
When the second operand is specified to be a shifted register, the operation of the barrel shifter is controlled by the
Shift field in the instruction. This field indicates the type of shift to be performed (logical left or right, arithmetic right or
rotate right). The amount by which the register should be shifted may be contained in an immediate field in the
instruction, or in the bottom byte of another register (other than R15). The encoding for the different shift types is
shown in Figure 3-5.
Instruction specified shift amount
When the shift amount is specified in the instruction, it is contained in a 5-bit field which may take any value from 0
to 31. A logical shift left (LSL) takes the contents of Rm and moves each bit by the specified amount to a more
significant position. The least significant bits of the result are filled with zeros, and the high bits of Rm which do not
map into the result are discarded, except that the least significant discarded bit becomes the shifter carry output
which may be latched into the C bit of the CPSR when the ALU operation is in the logical class (see above). For
example, the effect of LSL #5 is shown in Figure 3-6.
3-12
LSL #0 is a special case, where the shifter carry out is the old value of the CPSR C flag. The contents of Rm
are used directly as the second operand. A logical shift right (LSR) is similar, but the contents of Rm are
moved to less significant positions in the result. LSR #5 has the effect shown in Figure 3-7.
carry out
31
[6:5] Shift type
00 = logical left
10 = arithmetic right
[11:7] Shift amount
5 bit unsigned integer
11
27 26
7
6
5
01 = logical right
11 = rotate right
4
0
Figure 3-5. ARM Shift Operations
Figure 3-6. Logical Shift Left
Value of Operand 2
Contents of Rm
NOTE
[6:5] Shift type
00 = logical left
10 = arithmetic right
[11:8] Shift register
Shift amount specified in bottom-byte of Rs
11
RS
8
7
0
6
5
01 = logical right
11 = rotate right
4
1
0
0
0
0
S3C2410A
0
0

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