MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 210
MC68HC708AS48
Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC68HC708AS48.pdf
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Input/Output (I/O) Ports
Advance Information
210
When bit DDRGx is a logic 1, reading address $000A reads the PTGx
data latch. When bit DDRGx is a logic 0, reading address $000A reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port G pins.
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
DDRG
Bit
0
1
Input/Output (I/O) Ports
PTG
Bit
X
X
Table 15-7. Port G Pin Functions
Input, Hi-Z
I/O Pin
Output
Mode
Read/Write
DDRG[2:0]
DDRG[2:0]
Accesses
to DDRG
MC68HC708AS48
Table 15-7
PTG[2:0]
Read
Accesses to PTG
Pin
summarizes
PTG[2:0]
MOTOROLA
PTG[2:0]
—
Write
Rev. 4.0
(1)
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