MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 192

• Manufacturer Part Number: MC68HC708AS48
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Input/Output (I/O) Ports
15.4.2 Data Direction Register B
Advance Information
192
NOTE:
Address:
Data direction register B determines whether each port B pin is an input
or an output. Writing a logic 1 to a DDRB bit enables the output buffer for
the corresponding port B pin; a logic 0 disables the output buffer.
DDRB[7:0] — Data Direction Register B Bits
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 15-7
Reset:
Read:
Write:
These read/write bits control port B data direction. Reset clears
DDRB[7:0], configuring all port B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
DDRB7
READ DDRB ($0005)
WRITE DDRB ($0005)
WRITE PTB ($0001)
READ PTB ($0001)
$0005
Bit 7
0
Figure 15-6. Data Direction Register B (DDRB)
shows the port B I/O logic.
Input/Output (I/O) Ports
DDRB6
6
0
Figure 15-7. Port B I/O Circuit
RESET
DDRB5
5
0
DDRB4
DDRBx
PTBx
4
0
DDRB3
3
0
MC68HC708AS48
DDRB2
2
0
DDRB1
1
0
MOTOROLA
—
Rev. 4.0
DDRB0
Bit 0
0
PTBx