MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 165

• Manufacturer Part Number: MC68HC708AS48
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

12.4.2 Data Format
MC68HC708AS48
MOTOROLA
BREAK
$A5
START
BIT
START
START
—
BIT
BIT
Rev. 4.0
BIT 0
BIT 0
BIT 0
Table 12-2
monitor mode.
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. (See
The data transmit and receive rate can be anywhere from 4800 baud to
28.8 kBaud. Transmit and receive baud rates must be identical.
Monitor
1. If the high voltage (V
Modes
BIT 1
Figure 12-3. Sample Monitor Waveforms
User
the SIM asserts its COP enable output. The COP is an option enabled or disabled by
the COPD bit in the configuration register. (See
Characteristics
BIT 1
BIT 1
Figure 12-2. Monitor Data Format
BIT 2
Disabled
BIT 2
BIT 2
Enabled
is a summary of the differences between user mode and
COP
BIT 3
Monitor ROM (MON)
.)
BIT 3
BIT 3
(1)
DD
Table 12-2. Mode Differences
BIT 4
+ V
Vector
$FFFE
$FEFE
Reset
BIT 4
BIT 4
High
HI
) is removed from the IRQ/V
BIT 5
BIT 5
BIT 5
Vector
$FEFF
$FFFF
Reset
Low
BIT 6
BIT 6
BIT 6
Functions
Figure 12-2
Vector
$FFFC
$FEFC
BIT 7
Break
High
BIT 7
BIT 7
STOP
BIT
PP
21.5 5.0 Volt DC Electrical
STOP
STOP
$FEFD
Vector
$FFFD
Break
pin while in monitor mode,
BIT
BIT
Low
and
START
NEXT
BIT
Functional Description
START
START
NEXT
NEXT
BIT
BIT
Monitor ROM (MON)
Advance Information
Figure
Vector
$FFFC
$FEFC
High
SWI
12-3.)
$FEFD
Vector
$FFFD
Low
SWI
165