MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 335

• Manufacturer Part Number: MC68HC708AS48
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

20.4.1.2 Reset Mode
20.4.1.3 Run Mode
20.4.1.4 BDLC Wait Mode
MC68HC708AS48
MOTOROLA
—
Rev. 4.0
This mode is entered from power off mode whenever the BDLC supply
voltage, V
(V
reset must be asserted while powering up the BDLC or an unknown
state will be entered and correct operation cannot be guaranteed. Reset
mode is also entered from any other mode as soon as one of the MCU’s
possible reset sources (such as LVR, POR, COP watchdog, reset pin,
etc.) is asserted.
In reset mode, the internal BDLC voltage references are operative, V
is supplied to the internal circuits which are held in their reset state, and
the internal BDLC system clock is running. Registers will assume their
reset condition. Because outputs are held in their programmed reset
state, inputs and network activity are ignored.
This mode is entered from reset mode after all MCU reset sources are
no longer asserted. Run mode is entered from the BDLC wait mode
whenever activity is sensed on the J1850 bus.
Run mode is entered from the BDLC stop mode whenever network
activity is sensed, although messages will not be received properly until
the clocks have stabilized and the CPU is also in run mode.
In this mode, normal network operation takes place. The user should
ensure that all BDLC transmissions have ceased before exiting this
mode.
This power-conserving mode is entered automatically from run mode
whenever the CPU executes a WAIT instruction and if the WCM bit in
the BCR1 register is cleared previously.
In this mode, the BDLC internal clocks continue to run. The first
passive-to-active transition of the bus generates a CPU interrupt request
from the BDLC, which wakes up the BDLC and the CPU. In addition, if
DD
–10%) and some MCU reset source is asserted. The internal MCU
Byte Data Link Controller–Digital (BDLC–D)
DD
, rises above its minimum specified value
Byte Data Link Controller–Digital (BDLC–D)
Functional Description
Advance Information
DD
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