MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 186

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Input/Output (I/O) Ports
15.2 Introduction
Advance Information
186
Addr.
$0000
$0001
$0002
$0003
$0004
Data Direction Register A
NOTE:
Port C Data Register
Port D Data Register
Port A Data Register
Port B Data Register
Register Name
See page 188.
See page 191.
See page 194.
See page 197.
See page 189.
(DDRA)
In the 52-PLCC package (MC68HC708AS48CFN), thirty-nine
bidirectional input/output (I/O) pins and one input-only pin form six
parallel ports. In the 64-QFP package (engineering samples), forty-five
bidirectional I/O pins and one input only pin form seven parallel ports. All
I/O pins are programmable as inputs or outputs.
Connect any unused I/O pins to an appropriate logic level, either V
V
operation, termination reduces excess current consumption and the
possibility of electrostatic damage.
(PTC)
(PTD)
(PTB)
(PTA)
SS
Figure 15-1. I/O Port Register Summary
. Although the I/O ports do not require termination for proper
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
DDRA7
Bit 7
PTD7
PTA7
PTB7
R
R
0
0
Input/Output (I/O) Ports
= Reserved
DDRA6
PTD6
PTA6
PTB6
R
6
0
0
DDRA5
PTC5
PTD5
PTA5
PTB5
5
0
Unaffected by Reset
Unaffected by Reset
Unaffected by Reset
Unaffected by Reset
DDRA4
PTC4
PTD4
PTA4
PTB4
4
0
DDRA3
PTB3
PTC3
PTD3
PTA3
3
0
MC68HC708AS48
DDRA2
PTB2
PTC2
PTD2
PTA2
2
0
DDRA1
PTC1
PTD1
PTA1
PTB1
1
0
MOTOROLA
Rev. 4.0
DDRA0
Bit 0
PTC0
PTD0
DD
PTA0
PTB0
0
or

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