MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 104

• Manufacturer Part Number: MC68HC708AS48
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Clock Generator Module (CGM)
Advance Information
104
software must take appropriate action, depending on the application.
(See
The following conditions apply when the PLL is in automatic bandwidth
control mode:
The PLL also can operate in manual mode (AUTO = 0). Manual mode is
used by systems that do not require an indicator of the lock condition for
proper operation. Such systems typically operate well below f
require fast startup.
The following conditions apply when in manual mode:
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8.7 Interrupts
The ACQ bit (see
read-only indicator of the mode of the filter. (See
Acquisition and Tracking
The ACQ bit is set when the VCO frequency is within a certain
tolerance,
a certain tolerance,
Specifications
The LOCK bit is a read-only indicator of the locked state of the
PLL.
The LOCK bit is set when the VCO frequency is within a certain
tolerance,
a certain tolerance,
Specifications
CPU interrupts can occur if enabled (PLLIE = 1) when the PLL’s
lock condition changes, toggling the LOCK bit. (See
Control
ACQ is a writable control bit that controls the mode of the filter.
Before turning on the PLL in manual mode, the ACQ bit must be
clear.
Before entering tracking mode (ACQ = 1), software must wait a
given time, t
Specifications), after turning on the PLL by setting PLLON in the
PLL control register (PCTL).
Clock Generator Module (CGM)
Register.)
TRK
Lock
ACQ
for information and precautions on using interrupts.)
, and is cleared when the VCO frequency is out of
, and is cleared when the VCO frequency is out of
for more information.)
for more information.)
(see
8.6.2 PLL Bandwidth Control
8.10 Acquisition/Lock Time
UNT
UNL
. (See
. (See
Modes.)
8.10 Acquisition/Lock Time
8.10 Acquisition/Lock Time
MC68HC708AS48
8.4.2.2
Register) is a
8.6.1 PLL
BUSMAX
MOTOROLA
—
Rev. 4.0
and