MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 220

• Manufacturer Part Number: MC68HC708AS48
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Timer Interface (TIM)
16.4.4 Pulse Width Modulation (PWM)
Advance Information
220
NOTE:
registers to synchronously control the output after the TIM overflows. At
each subsequent overflow, the TIM channel registers (4 or 5) that control
the output are the ones written to last. TSC4 controls and monitors the
buffered output compare function, and TIM channel 5 status and control
register (TSC5) is unused. While the MS4B bit is set, the channel 5 pin,
PTF3/TCH5, is available as a general-purpose I/O pin.
In buffered output compare operation, do not write new output compare
values to the currently active channel registers. Writing to the active
channel registers is the same as generating unbuffered output
compares.
By using the toggle-on-overflow feature with an output compare
channel, the TIM can generate a PWM signal. The value in the TIM
counter modulo registers determines the period of the PWM signal. The
channel pin toggles when the counter reaches the value in the TIM
counter modulo registers. The time between overflows is the period of
the PWM signal.
As
registers determines the pulse width of the PWM signal. The time
between overflow and output compare is the pulse width. Program the
TIM to clear the channel pin on output compare if the state of the PWM
pulse is logic 1. Program the TIM to set the pin if the state of the PWM
pulse is logic 0.
PTEx/TCHx
Figure 16-3
OVERFLOW
Figure 16-3. PWM Period and Pulse Width
Timer Interface (TIM)
shows, the output compare value in the TIM channel
PULSE
WIDTH
PERIOD
COMPARE
OUTPUT
OVERFLOW
COMPARE
OUTPUT
MC68HC708AS48
OVERFLOW
MOTOROLA
—
COMPARE
Rev. 4.0
OUTPUT