MC68HC708AS48 FREESCALE [Freescale Semiconductor, Inc], MC68HC708AS48 Datasheet - Page 156

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MC68HC708AS48

Manufacturer Part Number
MC68HC708AS48
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Break Module (Break)
11.3 Features
11.4 Functional Description
Advance Information
156
Features of the break module include:
When the internal address bus matches the value written in the break
address registers, the break module issues a breakpoint signal (BKPT)
to the SIM. The SIM then causes the CPU to load the instruction register
with a software interrupt instruction (SWI) after completion of the current
CPU instruction. The program counter vectors to $FFFC and $FFFD
($FEFC and $FEFD in monitor mode).
These events can cause a break interrupt to occur:
When a CPU-generated address matches the contents of the break
address registers, the break interrupt begins after the CPU completes its
current instruction. A return-from-interrupt instruction (RTI) in the break
routine ends the break interrupt and returns the MCU to normal
operation.
Accessible I/O registers during the break interrupt
CPU-generated break interrupts
Software-generated break interrupts
COP disabling during break interrupts
A CPU-generated address (the address in the program counter)
matches the contents of the break address registers
Software writes a logic 1 to the BRKA bit in the break status and
control register.
Figure 11-1
Break Module (Break)
shows the structure of the break module.
MC68HC708AS48
MOTOROLA
Rev. 4.0

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