MPC8543VTANGA Freescale Semiconductor, MPC8543VTANGA Datasheet - Page 137

• Manufacturer Part Number: MPC8543VTANGA
• Description: Microprocessors - MPU PQ3 8543
• Manufacturer: Freescale Semiconductor

Specifications of MPC8543VTANGA

• Product Category: Microprocessors - MPU
• Rohs: yes
• Processor Series: PowerQUICC III
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C

the ground plane. Use ceramic chip capacitors with the highest possible self-resonant frequency. All traces
must be kept short, wide and direct.
Note the following:
22.3
Due to large address and data buses, and high operating frequencies, the device can generate transient
power surges and high frequency noise in its power supply, especially while driving large capacitive loads.
This noise must be prevented from reaching other components in the device system, and the device itself
requires a clean, tightly regulated source of power. Therefore, it is recommended that the system designer
place at least one decoupling capacitor at each V
device. These decoupling capacitors must receive their power from separate V
GV
inductance. Capacitors must be placed directly under the device using a standard escape pattern as much
as possible. If some caps are to be placed surrounding the part it must be routed with large trace to
minimize the inductance.
These capacitors must have a value of 0.1 µF. Only ceramic SMT (surface mount technology) capacitors
must be used to minimize lead inductance, preferably 0402 or 0603 sizes. Besides, it is recommended that
there be several bulk storage capacitors distributed around the PCB, feeding the V
OV
capacitors must have a low ESR (equivalent series resistance) rating to ensure the quick response time
necessary. They must also be connected to the power and ground planes through two vias to minimize
inductance. Suggested bulk capacitors—100–330 µF (AVX TPS tantalum or Sanyo OSCON). However,
customers must work directly with their power regulator vendor for best values, types and quantity of bulk
capacitors.
22.4
The SerDes block requires a clean, tightly regulated source of power (SV
jitter on transmit and reliable recovery of data in the receiver. An appropriate decoupling scheme is
outlined below.
Only surface mount technology (SMT) capacitors must be used to minimize inductance. Connections from
all capacitors to power and ground must be done with multiple vias to further reduce inductance.
Freescale Semiconductor
DD
DD
•
•
, LV
, GV
AV
Signals on the SerDes interface are fed from the XV
Decoupling Recommendations
SerDes Block Power Supply Decoupling Recommendations
DD
DD
DD
_SRDS must be a filtered version of SV
, and GND power planes in the PCB, utilizing short low impedance traces to minimize
, and LV
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
SV
Note:
1. An 0805 sized capacitor is recommended for system initial bring-up.
DD
DD
, planes, to enable quick recharging of the smaller chip capacitors. These bulk
1.0
Figure 60. SerDes PLL Power Supply Filter
2.2 µF
1
DD
GND
, TV
2.2 µF
DD
DD
.
, BV
1
DD
power plane.
DD
0.003 µF
, OV
DD
DD
, GV
AV
and XV
DD
DD
DD
_SRDS
, TV
DD
, and LV
System Design Information
DD
, TV
DD
) to ensure low
, BV
DD
DD
, BV
DD
pin of the
, OV
DD
,
DD
137
,