MPC8543VTANGA Freescale Semiconductor, MPC8543VTANGA Datasheet - Page 37

• Manufacturer Part Number: MPC8543VTANGA
• Description: Microprocessors - MPU PQ3 8543
• Manufacturer: Freescale Semiconductor

Specifications of MPC8543VTANGA

• Product Category: Microprocessors - MPU
• Rohs: yes
• Processor Series: PowerQUICC III
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C

A timing diagram for TBI receive appears in
8.2.6
This table presents the RGMII and RTBI AC timing specifications.
Freescale Semiconductor
Data to clock output skew (at transmitter)
Data to clock input skew (at receiver)
Clock period
Duty cycle for 10BASE-T and 100BASE-TX
Rise time (20%–80%)
Fall time (20%–80%)
Notes:
1. In general, the clock reference symbol representation for this section is based on the symbols RGT to represent RGMII and
2. This implies that PC board design requires clocks to be routed such that an additional trace delay of greater than 1.5 ns is
3. For 10 and 100 Mbps, t
4. Duty cycle may be stretched/shrunk during speed changes or while transitioning to a received packet's clock domains as long
5. Guaranteed by characterization.
6. In rev 1.0 silicon, due to errata, t
.
RTBI timing. For example, the subscript of t
(R) and fall (F) times follows the clock symbol that is being represented. For symbols representing skews, the subscript is
skew (SK) followed by the clock that is being skewed (RGT).
added to the associated clock signal.
as the minimum duty cycle is not violated and stretching occurs for no more than three t
between.
RCG[9:0]
3
RX_CLK
RGMII and RTBI AC Timing
Parameter/Condition
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
Figure 16. TBI Single-Clock Mode Receive AC Timing Diagram
RGT
scales to 400 ns ± 40 ns and 40 ns ± 4 ns, respectively.
t
TRRH
Table 33. RGMII and RTBI AC Timing Specifications
SKRGT
t
2
TRRDVKH
t
TRRX
is -650 ps (min) and 650 ps (max). See “eTSEC 10” in the device errata document.
3, 4
RGT
represents the TBI (T) receive (RX) clock. Note also that the notation for rise
Figure
Valid Data
Specifications
16.
t
RGTH
Symbol
t
t
t
SKRGT
t
SKRGT
RGTR
t
RGTF
RGT
/t
RGT
5
5
5
5
t
1
TRRDXKH
5
–500
Min
1.0
7.2
45
—
—
6
t
TRRF
Enhanced Three-Speed Ethernet (eTSEC)
RGT
of the lowest speed transitioned
Typ
8.0
50
—
—
—
0
t
TRRR
500
Max
0.75
0.75
2.8
8.8
55
6
Unit
ps
ns
ns
ns
ns
%
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