MPC8543VTANGA Freescale Semiconductor, MPC8543VTANGA Datasheet - Page 142

no-image

MPC8543VTANGA

Manufacturer Part Number
MPC8543VTANGA
Description
Microprocessors - MPU PQ3 8543
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8543VTANGA

Product Category
Microprocessors - MPU
Rohs
yes
Processor Series
PowerQUICC III
Data Bus Width
32 bit
Maximum Clock Frequency
800 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
BGA
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
System Design Information
142
2. Populate this with a 10 resistor for short-circuit/current-limiting protection.
3. The KEY location (pin 14) is not physically present on the COP header.
4. Although pin 12 is defined as a No-Connect, some debug tools may use pin 12 as an additional GND pin for
5. This switch is included as a precaution for BSDL testing. The switch must be closed to position A during BSDL
6. Asserting SRESET causes a machine check interrupt to the e500 core.
1. The COP port and target board must be able to independently assert HRESET and TRST to the processor
Notes:
COP Connector
improved signal integrity.
testing to avoid accidentally asserting the TRST line. If BSDL testing is not being performed, this switch must be
closed to position B.
Physical Pinout
in order to fully control the processor as shown here.
13
15
11
1
1
3
5
7
9
Board Sources
No pin
KEY
From Target
10
12
16
4
6
8
2
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
(if any)
14
13
11
15
10
12
16
SRESET
HRESET
4
6
5
8
9
1
3
7
2
3
COP_CHKSTP_OUT
COP_CHKSTP_IN
COP_VDD_SENSE
COP_TMS
COP_TDO
COP_TDI
COP_TCK
Figure 63. JTAG Interface Connection
COP_SRESET
COP_TRST
COP_HRESET
NC
NC
NC
4
B
2
5
A
10 k
10 
10 k
10 k
10 k
10 k
10 k
10 k
10 k
OV
DD
SRESET
HRESET
TRST
CKSTP_OUT
CKSTP_IN
TMS
TDO
TDI
TCK
Freescale Semiconductor
1
1
6

Related parts for MPC8543VTANGA