MPC8543VTANGA Freescale Semiconductor, MPC8543VTANGA Datasheet - Page 35

• Manufacturer Part Number: MPC8543VTANGA
• Description: Microprocessors - MPU PQ3 8543
• Manufacturer: Freescale Semiconductor

Specifications of MPC8543VTANGA

• Product Category: Microprocessors - MPU
• Rohs: yes
• Processor Series: PowerQUICC III
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C

Figure 14
8.2.4.2
This table provides the TBI receive AC timing specifications.
Freescale Semiconductor
TSECn_RX_CLK[0:1] clock period
TSECn_RX_CLK[0:1] skew
TSECn_RX_CLK[0:1] duty cycle
RCG[9:0] setup time to rising TSECn_RX_CLK
RCG[9:0] hold time to rising TSECn_RX_CLK
TSECn_RX_CLK[0:1] clock rise time (20%–80%)
TSECn_RX_CLK[0:1] clock fall time (80%–20%)
Notes:
1. The symbols used for timing specifications follow the pattern of t
2. Guaranteed by design.
inputs and t
timing (TR) with respect to the time data input signals (D) reach the valid state (V) relative to the t
going to the high (H) state or setup time. Also, t
signals (D) went invalid (X) relative to the t
reference symbol representation is based on three letters representing the clock of a particular functional. For example, the
subscript of t
appropriate letter: R (rise) or F (fall). For symbols representing skews, the subscript is skew (SK) followed by the clock that
is being skewed (TRX).
shows the TBI transmit AC timing diagram.
(first two letters of functional block)(reference)(state)(signal)(state)
TRX
TBI Receive AC Timing Specifications
GTX_CLK
TCG[9:0]
Parameter/Condition
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
represents the TBI (T) receive (RX) clock. For rise and fall times, the latter convention is used with the
Table 31. TBI Receive AC Timing Specifications
Figure 14. TBI Transmit AC Timing Diagram
t
TTXH
t
TTKHDV
t
TTXF
TRX
t
TTX
clock reference (K) going to the high (H) state. Note that, in general, the clock
TRDXKH
symbolizes TBI receive timing (TR) with respect to the time data input
t
Symbol
TRXH
t
t
t
TTXF
t
TRDVKH
TRDXKH
t
t
SKTRX
TRXR
TRXF
(first two letters of functional block)(signal)(state)(reference)(state)
t
for outputs. For example, t
TRX
/t
TRX
2
2
1
t
TTKHDX
t
TTXR
Min
7.5
2.5
1.5
0.7
0.7
40
—
Enhanced Three-Speed Ethernet (eTSEC)
t
TTXR
TRDVKH
16.0
Typ
—
—
—
—
—
—
TRX
symbolizes TBI receive
clock reference (K)
Max
8.5
2.4
2.4
60
—
—
—
Unit
ns
ns
ns
ns
ns
ns
%
for
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