MPC8543VTANGA Freescale Semiconductor, MPC8543VTANGA Datasheet - Page 46

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MPC8543VTANGA

Manufacturer Part Number
MPC8543VTANGA
Description
Microprocessors - MPU PQ3 8543
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8543VTANGA

Product Category
Microprocessors - MPU
Rohs
yes
Processor Series
PowerQUICC III
Data Bus Width
32 bit
Maximum Clock Frequency
800 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
BGA
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
Local Bus
Figure 23
This table describes the timing parameters of the local bus interface at BV
46
Local bus cycle time
Local bus duty cycle
Internal launch/capture clock to LCLK delay
Input setup to local bus clock (except LGTA/LUPWAIT)
LGTA/LUPWAIT input setup to local bus clock
Input hold from local bus clock (except LGTA/LUPWAIT)
LA[27:31]/LBCTL/LBCKE/LOE/
LSDA10/LSDWE/LSDRAS/
through
Output (Address) Signal:
LSDCAS/LSDDQM[0:3]
Output (Data) Signals:
PLL bypass mode is required when LBIU frequency is at or below 83 MHz.
When LBIU operates above 83 MHz, LBIU PLL is recommended to be
enabled.
LAD[0:31]/LDP[0:3]
LAD[0:31]/LDP[0:3]
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
Figure 28
Output Signals:
Input Signals:
Input Signal:
LSYNC_IN
LUPWAIT
LAD[0:31]
Table 42. Local Bus Timing Parameters—PLL Bypassed
Parameter
LGTA
LALE
show the local bus signals.
Figure 23. Local Bus Signals (PLL Enabled)
t
t
LBKHOV1
LBKHOV2
t
LBKHOV3
t
LBKHOV4
NOTE
t
t
t
t
t
LBIVKH1
LBIVKH2
LBKHOX1
LBKHOX2
LBKHOX2
t
t
t
LBKHOZ1
LBKHOZ2
LBKHOZ2
t
LBOTOT
t
Symbol
LBKH/
t
t
t
t
LBIVKH1
LBIXKH1
LBIVKL2
LBKHKT
t
LBK
t
LBK
1
–1.8
t
t
Min
LBIXKH1
2.3
6.2
6.1
LBIXKH2
12
43
DD
= 3.3 V with PLL disabled.
Max
4.4
57
Freescale Semiconductor
Unit
ns
ns
ns
ns
ns
%
Notes
4, 5
4, 5
4, 5
2
8

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