MPC8543VTANGA Freescale Semiconductor, MPC8543VTANGA Datasheet - Page 82

• Manufacturer Part Number: MPC8543VTANGA
• Description: Microprocessors - MPU PQ3 8543
• Manufacturer: Freescale Semiconductor

Specifications of MPC8543VTANGA

• Product Category: Microprocessors - MPU
• Rohs: yes
• Processor Series: PowerQUICC III
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C

Serial RapidIO
18.3
LP-serial links use differential signaling. This section defines terms used in the description and
specification of differential signals.
waveforms for either a transmitter output (TD and TD) or a receiver input (RD and RD). Each signal
swings between A volts and B volts where A > B. Using these waveforms, the definitions are as follows:
To illustrate these definitions using real values, consider the case of a CML (current mode logic)
transmitter that has a common mode voltage of 2.25 V and each of its outputs, TD and TD, has a swing
that goes between 2.5 and 2.0 V. Using these values, the peak-to-peak voltage swing of the signals TD and
TD is 500 mVp-p. The differential output signal ranges between 500 and –500 mV. The peak differential
voltage is 500 mV. The peak-to-peak differential voltage is 1000 mVp-p.
18.4
With the use of high-speed serial links, the interconnect media causes degradation of the signal at the
receiver. Effects such as inter-symbol interference (ISI) or data dependent jitter are produced. This loss can
be large enough to degrade the eye opening at the receiver beyond what is allowed in the specification. To
negate a portion of these effects, equalization can be used. The most common equalization techniques that
can be used are:
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1. The transmitter output signals and the receiver input signals TD, TD, RD, and RD each have a
2. The differential output signal of the transmitter, V
3. The differential input signal of the receiver, V
4. The differential output signal of the transmitter and the differential input signal of the receiver
5. The peak value of the differential transmitter output signal and the differential receiver input
6. The peak-to-peak value of the differential transmitter output signal and the differential receiver
•
•
peak-to-peak swing of A – B volts.
each range from A – B to –(A – B) volts.
signal is A – B volts.
input signal is 2  (A – B) volts.
A passive high pass filter network placed at the receiver. This is often referred to as passive
equalization.
The use of active circuits in the receiver. This is often referred to as adaptive equalization.
A Volts
B Volts
Signal Definitions
Equalization
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
Figure 51. Differential Peak–Peak Voltage of Transmitter or Receiver
TD or RD
TD or RD
Figure 51
Differential Peak-to-Peak = 2  (A – B)
shows how the signals are defined. The figures show
ID
, is defined as V
OD
, is defined as V
RD
– V
TD
RD
– V
.
TD
Freescale Semiconductor
.