MPC8543VTANGA Freescale Semiconductor, MPC8543VTANGA Datasheet - Page 81

• Manufacturer Part Number: MPC8543VTANGA
• Description: Microprocessors - MPU PQ3 8543
• Manufacturer: Freescale Semiconductor

Specifications of MPC8543VTANGA

• Product Category: Microprocessors - MPU
• Rohs: yes
• Processor Series: PowerQUICC III
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C

18
This section describes the DC and AC electrical specifications for the RapidIO interface of the
MPC8548E, for the LP-Serial physical layer. The electrical specifications cover both single- and
multiple-lane links. Two transmitters (short and long run) and a single receiver are specified for each of
three baud rates, 1.25, 2.50, and 3.125 GBaud.
Two transmitter specifications allow for solutions ranging from simple board-to-board interconnect to
driving two connectors across a backplane. A single receiver specification is given that accepts signals
from both the short- and long-run transmitter specifications.
The short-run transmitter must be used mainly for chip-to-chip connections on either the same
printed-circuit board or across a single connector. This covers the case where connections are made to a
mezzanine (daughter) card. The minimum swings of the short-run specification reduce the overall power
used by the transceivers.
The long-run transmitter specifications use larger voltage swings that are capable of driving signals across
backplanes. This allows a user to drive signals across two connectors and a backplane. The specifications
allow a distance of at least 50 cm at all baud rates.
All unit intervals are specified with a tolerance of ±100 ppm. The worst case frequency difference between
any transmit and receive clock is 200 ppm.
To ensure interoperability between drivers and receivers of different vendors and technologies, AC
coupling at the receiver input must be used.
18.1
For more information, see
18.2
Table 58
Freescale Semiconductor
Symbol
t
t
REFCJ
REFPJ
t
REF
Serial RapidIO
lists the Serial RapidIO SD_REF_CLK and SD_REF_CLK AC requirements.
REFCLK cycle time
REFCLK cycle-to-cycle jitter. Difference in the
period of any two adjacent REFCLK cycles.
Phase jitter. Deviation in edge location with
respect to mean edge location.
DC Requirements for Serial RapidIO SD_REF_CLK and
SD_REF_CLK
AC Requirements for Serial RapidIO SD_REF_CLK and
SD_REF_CLK
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
Parameter Description
Table 58. SD_REF_CLK and SD_REF_CLK AC Requirements
Section 16.2, “SerDes Reference Clocks.”
Min
–40
—
—
10(8)
Typ
—
—
Max
80
40
—
Unit
ns
ps
ps
8 ns applies only to serial
RapidIO with 125-MHz reference
clock
Comments
—
—
Serial RapidIO
81