MPC8543VTANGA Freescale Semiconductor, MPC8543VTANGA Datasheet - Page 83

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MPC8543VTANGA

Manufacturer Part Number
MPC8543VTANGA
Description
Microprocessors - MPU PQ3 8543
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8543VTANGA

Product Category
Microprocessors - MPU
Rohs
yes
Processor Series
PowerQUICC III
Data Bus Width
32 bit
Maximum Clock Frequency
800 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
BGA
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
18.5
AC electrical specifications are given for transmitter and receiver. Long- and short-run interfaces at three
baud rates (a total of six cases) are described.
The parameters for the AC electrical specifications are guided by the XAUI electrical interface specified
in Clause 47 of IEEE 802.3ae-2002.
XAUI has similar application goals to Serial RapidIO, as described in Section 8.1. The goal of this
standard is that electrical designs for Serial RapidIO can reuse electrical designs for XAUI, suitably
modified for applications at the baud intervals and reaches described herein.
18.6
LP-serial transmitter electrical and timing specifications are stated in the text and tables of this section.
The differential return loss, S11, of the transmitter in each case shall be better than:
The reference impedance for the differential return loss measurements is 100- resistive. Differential
return loss includes contributions from on-chip circuitry, chip packaging, and any off-chip components
related to the driver. The output impedance requirement applies to all valid output levels.
It is recommended that the 20%–80% rise/fall time of the transmitter, as measured at the transmitter output,
in each case have a minimum value 60 ps.
It is recommended that the timing skew at the output of an LP-serial transmitter between the two signals
that comprise a differential pair not exceed 25 ps at 1.25 GB, 20 ps at 2.50 GB, and 15 ps at 3.125 GB.
Freescale Semiconductor
Output voltage
Differential output voltage
Deterministic jitter
Total jitter
Multiple output skew
Unit Interval
Characteristic
–10 dB for (baud frequency)/10 < Freq(f) < 625 MHz, and
–10 dB + 10log(f/625 MHz) dB for 625 MHz  Freq(f)  baud frequency
Explanatory Note on Transmitter and Receiver Specifications
Transmitter Specifications
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9
Table 59. Short Run Transmitter AC Timing Specifications—1.25 GBaud
Symbol
V
DIFFPP
S
V
J
J
UI
MO
D
O
T
–0.40
Min
500
800
Range
1000
1000
Max
2.30
0.17
0.35
800
mV p-p
UI p-p
UI p-p
Unit
ps
ps
V
Voltage relative to COMMON of either signal
comprising a differential pair
Skew at the transmitter output between lanes of a
multilane link
±100 ppm
Notes
Serial RapidIO
83

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