LCMXO2280C-5TN144C LATTICE SEMICONDUCTOR, LCMXO2280C-5TN144C Datasheet - Page 108

• Manufacturer Part Number: LCMXO2280C-5TN144C
• Description: MACHXO PLD FLASH, SCRAM 1.8V, SMD
• Manufacturer: LATTICE SEMICONDUCTOR
• Series: MachXOr

Specifications of LCMXO2280C-5TN144C

• Cpld Type: FLASH
• No. Of Macrocells: 1140
• No. Of I/o's: 113
• Propagation Delay: 3.6ns
• Global Clock Setup Time: 1.1ns
• Frequency: 600MHz
• Supply Voltage Range: 1.71V To 3.465V
• Operating: RoHS Compliant

Lattice Semiconductor
sysIO Standards Supported in Each Bank
Table 8-3. I/O Standards Supported by Various Banks in the MachXO640 and MachXO256
Table 8-4. I/O Standards Supported by I/O Pins on Each Side of the MachXO1200 and MachXO2280
LVCMOS Buffer Configurations
All LVCMOS buffer have programmable pull, programmable drive and programmable slew configurations that can
be set in the software.
Programmable PULLUP/PULLDOWN/BUSKEEPER
When configured as LVCMOS or LVTTL, each sysIO buffer has a weak pull-up, a weak pull-down resistor and a
weak buskeeper (bus hold latch) available. Each I/O can independently be configured to have one of these features
or none of them.
I/O Buffer Type
Output Standards
Supported
Inputs
Clock Inputs
1. These differential standards are implemented by using complementary LVCMOS driver with external resistor pack.
2. MachXO256 only has 2 banks, Banks 0 and Bank 1.
I/O Buffer Type
Output Standards 
Supported
Inputs
Clock Inputs
PCI Support
LVDS Output Buffers
1. These differential standards are implemented by using complementary LVCMOS driver with external resistor pack.
2. These are supported on half the I/Os of the bank.
Description
Description
Single-ended
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
LVDS25E
LVPECL
BLVDS
RSDS
All Single-ended
All Single-ended
Single-ended
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI33
LVDS25E
LVPECL
BLVDS
RSDS
All Single-ended, 
Differential
All Single-ended, 
Differential (PLL input)
PCI33 with Clamp
1
1
1
Bank 0
1
1
1
1
1
Top
Single-ended
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
LVDS25E
LVPECL
BLVDS
RSDS
All Single-ended
All Single-ended
Single-ended and 
Differential
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
LVDS25
LVDS25E
LVPECL
BLVDS
RSDS
All Single-ended, 
Differential
All Single-ended, 
Differential (PLL input)
LVDS (3.5mA) Buffers
1
1
1
1
Bank1
1
1
2
1
Right
1
8-5
Single-ended
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
LVDS25E
LVPECL
BLVDS
RSDS
All Single-ended
All Single-ended
Single-ended
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
LVDS25E
LVPECL
BLVDS
RSDS
All Single-ended, 
Differential
All Single-ended, 
Differential (PLL input)
1
1
1
1
1
Bank2
Bottom
1
1
1
MachXO sysIO Usage Guide
Single-ended
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
LVDS25E
LVPECL
BLVDS
RSDS
All Single-ended
All Single-ended
Single-ended and 
Differential
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
LVDS25
LVDS25E
LVPECL
BLVDS
RSDS
All Single-ended, 
Differential
All Single-ended, 
Differential (PLL input)
LVDS (3.5mA) Buffers
1
1
1
1
1
2
1
Bank3
1
1
Left