LCMXO2280C-5TN144C LATTICE SEMICONDUCTOR, LCMXO2280C-5TN144C Datasheet - Page 178

• Manufacturer Part Number: LCMXO2280C-5TN144C
• Description: MACHXO PLD FLASH, SCRAM 1.8V, SMD
• Manufacturer: LATTICE SEMICONDUCTOR
• Series: MachXOr

Specifications of LCMXO2280C-5TN144C

• Cpld Type: FLASH
• No. Of Macrocells: 1140
• No. Of I/o's: 113
• Propagation Delay: 3.6ns
• Global Clock Setup Time: 1.1ns
• Frequency: 600MHz
• Supply Voltage Range: 1.71V To 3.465V
• Operating: RoHS Compliant

Lattice Semiconductor
Figure 10-14. Primary Clock and Secondary Clock/CE/LSR Distribution
Maximum Number of Secondary Clocks Available
As illustrated in Figure Figure 10-14, there are four secondary clock nets in the clock distribution network but only
three of them are reaching the clock input mux at PFU. This limits the number of total secondary clocks available to
three.
Post Map Preference Editor Usage
Fine delay adjustment can be entered in the Post-Map Preference Editor after “Place and Run” to determine the
required timing for the system design.
The Clock Preference assignments are also entered in the Post-Map Preference Editor. Figure 10-15 shows an
example screen shot. To see a similar screen shot for Diamond design software, go to Appendix A, Figure 10-20.
Global Clocks
Global Clocks
From Routing
Outputs
From Routing
PLL
CLKOP
CLKOS
CLKOK
CLKOP
CLKOS
CLKOK
12
4
6
4
6
Secondary Clock/CE/LSR Net
Primary Clock Net
PCLK0
PCLK1
PCLK2
PCLK3
SCLK0/CE/LSR
SCLK1/CE/LSR
SCLK2/CE/LSR
SCLK3/CE/LSR
10-16
Primary Clock
Secondary Clock
Secondary Clock
Secondary Clock
Local
Local
/CE/LSR
/CE/LSR
/CE/LSR
Local
Design and Usage Guide
MachXO sysCLOCK PLL
3
4
3
3
CLK(0:3)
CE(0:3)
LSR(0:3)
PFU
PFU
PFU