LCMXO2280C-5TN144C LATTICE SEMICONDUCTOR, LCMXO2280C-5TN144C Datasheet - Page 225

• Manufacturer Part Number: LCMXO2280C-5TN144C
• Description: MACHXO PLD FLASH, SCRAM 1.8V, SMD
• Manufacturer: LATTICE SEMICONDUCTOR
• Series: MachXOr

Specifications of LCMXO2280C-5TN144C

• Cpld Type: FLASH
• No. Of Macrocells: 1140
• No. Of I/o's: 113
• Propagation Delay: 3.6ns
• Global Clock Setup Time: 1.1ns
• Frequency: 600MHz
• Supply Voltage Range: 1.71V To 3.465V
• Operating: RoHS Compliant

Lattice Semiconductor
Table 14-2. Lattice Semiconductor BGA Package Types
BGA Breakout and Routing Examples
Lattice provides several resources and different design implementations that show BGA breakout and routing of
various fine-pitch BGA packages. Different stack up and layer counts are also used to show a range of design rules
and fabrication costs. It is important to consult with your board fabrication and assembly houses as to the most
economical and reliable process for your application.
Currently there is a wide choice of BGAs from Lattice, with many devices offered in multiple packages and pitches
of BGA densities as well as non-BGA options such as TQFP, QFN and others. The BGA pitch or “center to center”
ball dimensions include, 1.00 mm BGAs, space-saving 0.5 mm pitch chip scale BGA and 0.4mm pitch ultra chip
scale BGA packages. Fine pitch packages offer advantages and disadvantages alike. Finer pitch means that the
trace and space limits will have to be adjusted down to match the BGA. Many times a design can get away with
small traces underneath the BGA then fan out with a slightly larger trace width. The PCB fabrication facility will
need to be aware of your design objectives and check for the smallest trace dimensions supported. Smaller traces
take more time to inspect, check and align etc. Etching needs to be closely monitored when trace and space rules
reach their lower limit.
The combination of fanout traces, escape vias, and escape traces that allow routing out from under the BGA pin
array to the perimeter of the device are collectively referred to as the “BGA breakout”. The fanout pattern will
arrange the breakout via, layer, and stack-up to maximize the number of I/Os that can be routed. Fanout patterns
are an important consideration for devices over 800 pins and can be follow polar (north/south/east/west) or layer-
biased directions. (Source: BGA Breakouts and Routing, Charles Pfeil, Mentor Graphics).
Package Type
fpSBGA
caBGA
csBGA
ucBGA
fpBGA
fcBGA
PBGA
ftBGA
SBGA
Plastic BGA with 1.27 mm solder ball pitch. Die up configuration.
Fine Pitch BGA – Plastic BGA with 1.0 mm solder ball pitch. Die up configuration.
Fine Pitch Thin BGA – Thin plastic BGA with 1.0 mm solder ball pitch. Die up configuration.
Chip Array BGA – Plastic BGA with 0.8 mm solder ball pitch. Die up configuration.
Chip Scale BGA – Plastic BGA with 0.5 mm solder ball pitch. Die up configuration.
Flip-Chip BGA with 1.0 mm solder ball pitch. Die down configuration. May have a ceramic or plastic sub-
strate.
Super BGA – Similar to PBGA, but with an integrated heatsink plate. This package has 1.27 mm solder ball
pitch and die down configuration. SBGA packages offer enhanced thermal dissipation capability.
Fine Pitch SBGA – Super BGA with 1.0 mm solder ball pitch. Die down configuration.
Ultra Chip BGA – Saw singulated plastic ball grid array package with 0.4 mm ball pitch.
14-2
Description
PCB Layout Recommendations
for BGA Packages